A solid state memory array in which the memory cells are arranged in rows and columns is provided with a word line for each row and one or more bit line(s) for each column. Each word line is common to all the memory cells within its given row, and the bit line(s) for each column is (are) common to all memory cells in that column. The operation of reading the contents of a selected memory cell comprises the steps of applying a voltage signal to the word line corresponding to the row containing the line selected memory cell, and sensing a voltage change on the bit line(s) for the column containing the selected memory cell. The bit line(s) is (are) coupled to sense amplification circuitry in order to generate usable signals.
It is known in the prior art to provide a reference voltage for the sensing circuitry, which reference voltage is generated by a voltage offset from the highest supply line. However, in a large memory array the word lines are physically distributed over a relatively large area, and thus the applied word line voltages for the different rows of memory cells exhibit an unavoidable degree of variation. Process variations also manifest themselves in a somewhat poorly controlled reference voltage. The result is an inevitable mismatch between the read reference voltage and at least some of the high word line voltages, with consequential reduced noise margins and reduced stability. Put another way, from the point of view of given memory cell, the reference voltage will appear different, thus leading to pattern sensitive operation. Other process variations could cause additional mismatching between the read reference voltage and the high word line voltage which would result in even less stability and more pattern sensitivity. Moreover, while any noise on the high supply line is translated to the read reference voltage, the parasitic loading on the word lines are drastically different so that the noise is not necessarily translated to the word lines. Disturbances of the memory cells and limitations in the range of operations have been attributed to such noise.
Thus, there is presented the need for increased reliability in the reading of large memory arrays to enable the use of such arrays under a wide variety of conditions.